- Semicon 2.0 outlay and approval status
- Six pillars of Semicon India Programme 2.0
- Who can seek support under Semicon 2.0
- Semicon 2.0 application process and deadline
- Semicon India progress before Programme 2.0
- Why equipment materials and packaging matter
- How to apply for Semicon 2.0 opportunities
- Semicon 2.0 incentive appraisal considerations
- Semiconductor talent research and startup opportunity
- How to verify a genuine Semicon 2.0 notice
- India Semiconductor Mission scheme implementation status
- Important Links
Semicon 2.0 Programme was approved by the Union Cabinet on 15 July 2026 with a total outlay of ₹1,27,500 crore. The second phase expands India’s semiconductor policy across chip design, fabrication, advanced packaging, equipment and materials, research and talent. It is an industrial programme, not one universal public-benefit form, and no single common application deadline was announced as of 20 August 2026.
Semicon 2.0 outlay and approval status
The programme has moved beyond a proposal: Cabinet approval establishes the policy and funding envelope. Individual projects will still follow scheme-specific appraisal and implementation rules.
| Programme item | Verified detail |
|---|---|
| Cabinet approval | 15.07.2026 |
| Total outlay | Approximately ₹1,27,500 crore |
| Implementing ecosystem | India Semiconductor Mission under the Ministry of Electronics and Information Technology |
| Programme coverage | Design, manufacturing, packaging, equipment, materials, research and skills |
| Universal deadline | No single programme-wide deadline announced as of 20.08.2026 |
Six pillars of Semicon India Programme 2.0
The official framework treats the supply chain as a connected system. The objective is not limited to a fabrication plant; it also addresses inputs, intellectual property, packaging and people.
| Pillar | What it covers |
|---|---|
| Semiconductor design | Domestic chip design capabilities, intellectual property and design-linked support |
| Equipment and materials | Production equipment, specialty chemicals, gases, substrates and other inputs |
| Fabrication facilities | Semiconductor and display manufacturing capacity |
| Advanced packaging | Assembly, testing, marking, packaging and newer packaging technologies |
| Research and development | Applied research, technology development and industry-academia collaboration |
| Talent development | Engineers, technicians and specialist skills needed by the ecosystem |
Who can seek support under Semicon 2.0
The likely applicants are companies and project consortia with technically and financially credible proposals. Students and jobseekers may benefit from the talent and employment ecosystem, but they do not apply to the entire ₹1.27 lakh crore programme through a single personal form.
| Stakeholder | Relevant programme route |
|---|---|
| Chip design companies and startups | Design and intellectual-property support under notified components |
| Fabrication project promoters | Scheme-specific applications for eligible manufacturing facilities |
| Packaging and testing companies | Advanced packaging and ATMP/OSAT-related support routes |
| Equipment and material suppliers | Domestic supply-chain proposals under the second-phase framework |
| Research institutions | R&D and industry-academia collaboration opportunities |
| Students and professionals | Training, curriculum, research and employment opportunities announced separately |
Semicon 2.0 application process and deadline
The India Semiconductor Mission portal is the official programme point, but each scheme or project window can carry its own eligibility, forms and dates. Treating the Cabinet outlay as an always-open grant would be inaccurate.
| Application question | Position verified on 20.08.2026 |
|---|---|
| Is there one common application form | No universal public form was announced for all six pillars |
| Is there one last date | No single programme-wide deadline was published |
| Where project proponents should begin | India Semiconductor Mission portal and the relevant notified scheme |
| What applicants should prepare | Project structure, technology plan, financing, location, partners and compliance information |
| What to verify before submission | The current guideline, eligible cost, incentive ceiling and application window for that component |
Semicon India progress before Programme 2.0
The second phase builds on projects already approved under the earlier programme. These figures provide context for the larger outlay without implying that every approved project is already producing at full scale.
| Progress indicator | Official figure |
|---|---|
| Startups designing chips | 105 |
| Projects approved under the earlier programme | 12 |
| Committed investment in those projects | Approximately ₹1.64 lakh crore |
| Projects in commercial production | 3 at the time of the Cabinet communication |
| Programme direction | Greater domestic value addition and supply-chain resilience |
Why equipment materials and packaging matter
A fabrication unit depends on imported tools, gases, chemicals and substrates unless the upstream chain also develops. Packaging is equally important because a fabricated wafer must be tested, assembled and integrated before it becomes a usable component.
| Ecosystem layer | Strategic role |
|---|---|
| Manufacturing equipment | Enables wafer processing, inspection, metrology and packaging operations |
| Specialty materials | Supplies wafers, gases, chemicals and process consumables |
| Advanced packaging | Improves performance, integration, testing and final-product readiness |
| Chip design | Creates intellectual property and products for Indian and global markets |
| Talent and R&D | Supports technology absorption, operation and future innovation |
How to apply for Semicon 2.0 opportunities
- Read the Cabinet approval and official fact sheet in Important Links.
- Identify the relevant pillar rather than assuming that one application covers the entire programme.
- Open the India Semiconductor Mission portal and review its current scheme pages.
- Check the guideline, applicant type, eligible expenditure and incentive structure for the chosen component.
- Use only the deadline printed in that scheme’s current notice.
- Keep corporate, technical, financial and land or infrastructure documents ready where required.
- Monitor MeitY and PIB releases for new operational guidelines or calls for proposals.
Semicon 2.0 incentive appraisal considerations
Cabinet approval does not mean every proposal automatically receives funding. Semiconductor projects are capital-intensive and technically demanding, so the relevant scheme authorities examine the technology, promoter capability, financing plan, implementation schedule and the portion of expenditure that qualifies for support. A credible proposal must explain what will be made in India, how the technology will be obtained or developed, and how the project connects with customers and suppliers.
Project proponents should separate the headline programme outlay from the incentive available to a particular project. The applicable guideline determines eligible costs, the permitted support formula, milestones and disbursement conditions. Announcements by a state government may add local incentives, but they do not replace the Central scheme or its appraisal. Applicants should therefore reconcile both packages and avoid counting the same expenditure twice unless the rules expressly allow it.
| Appraisal area | Evidence a project may need |
|---|---|
| Technology | Process, product, intellectual-property and technology-partner details |
| Finance | Project cost, funding sources, promoter contribution and viability assumptions |
| Implementation | Location, utilities, construction, equipment and milestone schedule |
| Market | Target products, customer demand, capacity plan and sales strategy |
| Domestic value addition | Indian design, suppliers, skills, manufacturing and research contribution |
Semiconductor talent research and startup opportunity
The talent pillar matters because a factory cannot operate on capital equipment alone. Fabrication, packaging and design require different skills: process integration, equipment maintenance, materials science, verification, embedded systems, packaging design, reliability testing and production quality. New curriculum or training calls will be issued through their own institutions and agencies, so learners should follow recognised programmes rather than treating the main ISM registration page as a student scholarship form.
For startups, the opportunity extends beyond designing a complete processor. Useful products include application-specific chips, verification tools, semiconductor intellectual property, packaging solutions, sensors and equipment subsystems. The official statement that 105 startups are already designing chips shows that the policy is building a design base, but it does not promise automatic selection for every startup. Teams still need a defensible product, capable engineering, ownership or lawful access to intellectual property, and a route to fabrication and customers.
| Opportunity area | Example capability |
|---|---|
| Chip design | Architecture, RTL, verification, physical design and reusable IP |
| Fabrication operations | Process control, equipment engineering, yield and clean-room disciplines |
| Packaging | Assembly, test, reliability, thermal design and heterogeneous integration |
| Materials and equipment | Precision manufacturing, chemicals, gases, substrates and metrology |
| Research | Industry-linked prototypes, process development and technology transfer |
How to verify a genuine Semicon 2.0 notice
Large programme figures attract unofficial forms and misleading claims. A genuine notice should be traceable to the India Semiconductor Mission, MeitY, the Press Information Bureau or another named government agency. It should identify the exact component, eligible applicant, authority, submission method and deadline. A social-media graphic carrying only the ₹1.27 lakh crore figure is not an application notification.
Before sharing corporate or technical documents, check the web address and find the same announcement through the official portal’s own navigation. Project promoters should retain the applicable guideline and any corrigendum used for submission because scheme terms can evolve. Where a state incentive is involved, verify it separately on the state investment agency’s official website. This source discipline also prevents confusion between Semicon India, individual fabrication incentives, design-linked support and unrelated private investment offers.
| Authenticity check | Reliable signal |
|---|---|
| Publishing authority | ISM, MeitY, PIB or another clearly identified government body |
| Scheme identity | Exact pillar or component rather than a vague reference to the whole programme |
| Application terms | Eligible applicant, documents, incentive and submission route are stated |
| Deadline | Appears in the component’s current notice, not an aggregator headline |
| Changes | Corrigenda and extensions can be matched to the original official notice |
India Semiconductor Mission scheme implementation status
Semicon 2.0 is a programme umbrella. Its Cabinet-approved scope must be translated into component guidelines, project approvals and milestone-based implementation. That distinction explains why the official sources can confirm the full outlay while still showing no single closing date for every type of proposal. A fabrication facility and a research call cannot reasonably use identical appraisal documents or timelines.
Companies should watch for a notice that names their component and then read the current guideline in full. Earlier India Semiconductor Mission schemes remain useful context, but a previous form or incentive percentage should not be assumed to apply unchanged to Programme 2.0. The authoritative position is the latest notice associated with the specific project category. If an application portal displays a scheme name that does not match the proposed activity, the proponent should resolve that mismatch before uploading confidential business information.
| Implementation layer | What it establishes |
|---|---|
| Cabinet approval | The national policy direction and ₹1,27,500 crore programme envelope |
| Component guideline | Eligible applicants, costs, incentive conditions and evaluation method |
| Application window | The submission period for a named scheme or call for proposals |
| Project approval | Government acceptance of a particular proposal subject to conditions |
| Milestone disbursement | Release of support against verified progress and compliance |
The programme also has a wider economic purpose: reduce vulnerable import dependencies, deepen domestic value addition and connect Indian design capability with manufacturing and packaging. Success therefore depends on coordination across ministries, states, companies, universities and training institutions. The 12 earlier approved projects and 105 chip-design startups are a base, not the final target. New notices should be read in that ecosystem context while remaining precise about which applicant, incentive and deadline they actually govern.
Important Links
| Resource | Direct link |
|---|---|
| Cabinet approval release | Official PIB announcement |
| Semicon 2.0 fact sheet PDF | Download official programme fact sheet |
| India Semiconductor Mission | Official ISM portal |
| ISM registration portal | Open project registration |
| Ministry of Electronics and IT | MeitY official website |
🔥 Related: Semicon 2.0 Programme
Frequently Asked Questions
When was Semicon 2.0 approved?
The Union Cabinet approved it on 15 July 2026.
What is the outlay?
The total programme outlay is approximately ₹1,27,500 crore.
How many pillars are there?
There are six pillars covering design, inputs, fabs, packaging, R&D and talent.
Is there one public application form?
No single form covers every pillar and applicant type.
Is there a universal deadline?
No programme-wide last date was announced as of 20 August 2026.
Where should companies check?
Use the India Semiconductor Mission portal and the current component guideline.
Can individuals claim the full incentive?
No. Support is tied to eligible projects and notified components.
Does it include chip design?
Yes. Semiconductor design is one of the six pillars.
Does it cover packaging?
Yes. Advanced packaging is a distinct pillar.
Where is the official PDF?
The PIB fact sheet PDF is linked in Important Links.